Aging Models for Analog Circuit Level Simulations – Integration and Deployment Challenges

Overview

In the analog circuit design domain Spice simulators are the most commonly used tools for design exploration and verification.
Consequentially an integration of add-on models for aging effects like BTI and HCI using one of several available interfaces is
considered a straightforward enhancement allowing to address reliability analysis and verification. This talk will give an outline of all the not-so-straightforward challenges arising from the integration and deployment of complex aging models in the harsh environmental conditions of state-of-the-art EDA tool ecosystems.

About the Speaker
Rotter_Picture_V3Peter Rotter was born in Germany in 1965. He received the diploma degree in physics from the University of Regensburg in Germany in 1994, followed by a Ph.D. degree from the same institute in 1997.

In 1998 he joined the central CAD department of the Infineon Technologies AG. In the section responsible for Infineon’s Full Custom Design Flow development he worked over the years on various analog topics, like Spice simulator integration, PDK interfaces, post-layout simulation, analog model validation, statistical simulation, design for yield, design for reliability, general analog automation and analog sign-off methodology.

He current holds the position of a Senior Specialist Analog Sign-Off Methodology.

The research interests of Peter Rotter include analog and reliability verification, analog design automation and sign-off methodologies.

He has participated in various EU and national funded projects like Verona, Syena, Rely, Morv and Resist with a continuously strong interest in strengthening the collaboration of industry and academia.

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